1. Field of the Invention
The present invention relates in general to sigma-delta data converters, and in particular to a sigma-delta data converter providing improved quantization noise shaping through error feedback.
2. Description of Related Art
Sigma-Delta ADC Architecture
FIG. 1 depicts a prior art sigma-delta analog-to-digital converter (ADC) 10 including a sample and hold (S/H) circuit 12, a sigma-delta modulator 14, and a digital decimator 16, for digitizing an analog input signal AIN to produce an output data sequence D representing the analog input signal. S/H circuit 12 samples the AIN signal on each pulse of a clock signal (CLOCK) at a rate much higher than the AIN signal bandwidth to produce a sequence of discrete analog samples xn supplied as input to sigma-delta modulator 14. Sigma-delta modulator 14 responds to each pulse of the CLOCK signal by generating an element of an output sequence yn. When each element of the yn sequence is, for example, a single bit wide, sigma-delta modulator 14 sets the yn bit to a logical 1 increasingly more frequently than to a logical 0 as AIN increases in magnitude so that the density of 1""s in the yn sequence is proportional to the magnitude of AIN. When the yn sequence is more than one bit, sigma-delta modulator 14 generates higher values of yn with increasing frequency as AIN increases. Decimator 16 carries out the function of a finite impulse response (FIR) filter, filtering the yn sequence to produce a sequence of elements       D    n    =            ∑              i        =                  -          N1                    N2        ⁢          xe2x80x83        ⁢                  f        i            ⁢              xe2x80x83            ⁢              y                  n          -          i                    
Sigma-delta modulator 14 includes an analog summing circuit 18, an analog filter 20 having a discrete transfer function H(zxe2x88x921), an m-bit ADC converter 22, and an m-bit digital-to-analog converter 24. Filter 20 filters the output sequence an of summer 18 to produce an analog sequence bn. ADC 22 digitizes bn to produce yn. For example when m=1, and bn is above a threshold level, ADC 22 sets yn to a 1 and otherwise sets yn to a 0 when bn is below the threshold level. DAC 24 therefore drives its analog output signal cn to the maximum expected level of xn when yn is a 1 and drives cn to the minimum expected level of xn when yn is a 0. The feedback loop formed by devices 18-24 tries to keep bn at the ADC""s threshold level and to do that, it has to drive yn to a 1 with a frequency that increases with the amplitude of AIN. Modulator 14 operates in a generally similar manner when m greater than 1 except that ADC 22 and DAC 24 adjust yn and cn with m-bit resolution.
Sigma-Delta DAC
FIG. 3 illustrates a conventional sigma-delta DAC 30 for converting a sequence of p-bit data words xn into an analog output signal A. DAC 30 includes a sigma-delta demodulator 32 for converting xn into an m-bit wide output sequence yn. An m-bit DAC 34 drives its output Axe2x80x2 high or low depending on the state of yn, and an analog filter 36 removes out-of-band quantization noise from the Axe2x80x2 signal to produce the A signal. Sigma-delta demodulator 32 includes a summer 38 for generating a data value an=xnxe2x88x92cn, a digital filter 40 for filtering the an data sequence with a transfer function H(zxe2x88x921) to produce a data sequence bn, and a digital quantizer 42 for generating an element of the yn sequence in response to each corresponding element of the bn sequence. Each element of the yn sequence has m bits, where m is more than zero and less than the number of bits of elements of the bn sequence, and each element of the yn sequence represents the same quantity as a corresponding element of the bn sequence, but with lower resolution. The yn sequence is provided as the cn sequence input to summer 38 which
where N1 and N2 are integers and FIR filter coefficients fxe2x88x92N1xe2x88x92fN2 are numbers selected to give decimator 16 selected low pass or band pass characteristics to eliminate aliasing and out-of-band quantization noise. Decimator 16 reduces the number of elements of the Dn sequence by a factor of k to produce output sequence D. That is, only every kth element of the Dn sequence becomes an element of the D sequence.
FIG. 2 is a timing diagram illustrating a simple example wherein k=3, i has values of the set {xe2x88x921, 0, 1}, and all filter coefficients fxe2x88x921=f0=f1=1. Thus in this example each element of the D sequence is equal to a sum of a separate set of k=three elements of the yn sequence, although in practice filter coefficients f will often have values other than 1 to provide desired low pass or band pass filter characteristics.
ADC 10 has an input range of 0-3 volts, and the AIN signal ramps linearly from 0 to 3 volts during 36 CLOCK cycles, and the xn signal is a step-wise approximation of the AIN signal. Note that the density of 1""s in the yn sequence increases with the magnitude of xn. In this simple example, decimator 16 sums the preceding three yn sequence bits to produce each element of the D sequence. A digital data word having n bits represents a magnitude with xe2x80x9cn-bit resolutionxe2x80x9d since the word can have any of 2n different combinations of bit states, each of which represents a different magnitude. In the example of FIG. 2, the output sequence D of ADC 10 represents input signal magnitude AIN with 2-bit resolution because the 2-bit wide elements of the D sequence can be any of 22 values of the set {0, 1, 2, 3}. We can increase the resolution of ADC 10 by increasing k. For example, if decimator 16 sums yn sequence elements during k=255 clock cycles, then elements of the D sequence would be 8-bits wide and could represent 28 different signal magnitudes. However to avoid aliasing, the clock signal frequency should be at least k times the Nyquist frequency of the AIN signal. subtracts the cn sequence from the most significant bits of the xn sequence. Sigma-delta DAC 30 can control the magnitude of output analog signal A with substantially higher resolution than DAC 34, provided that the frequency at which xn sequence are provided is substantially higher than the highest frequency component of output signal A.
Quantization Noise
The ADC 22 of FIG. 1 and digital quantizer 42 essentially xe2x80x9cround offxe2x80x9d the value represented by their input bn sequences to produce their output sequences yn. For example when bn can represent any integer value between 0 and 7, and yn is only one bit wide, a yn value of 0 is equivalent to a bn value of 0 and yn value of 1 is equivalent to a bn value of 7. When bn has some value between 0 and 7, ADC 22 or digital quantizer 42 essentially rounds bn down to 0 or up to 7 when determining whether to set yn to a 0 or a 1. Thus, for example, when bn has value 2, yn will be set to 0 and the difference between the values represented by corresponding bn and yn sequence element (called the xe2x80x9cquantization errorxe2x80x9d of the sigma-delta modulator or demodulator) will be bnxe2x88x92yn=2xe2x88x920=2. When bn has value 6, yn will be set to a 1 (representing 7) and the quantization error will be 6xe2x88x927=xe2x88x921. The quantization error can be reduced by increasing the width m of yn but cannot be eliminated since in a sigma-delta modulator or demodulator because yn always has fewer bits than bn.
To improve the accuracy of ADC 10 or DAC 30, it is beneficial to reduce the effects of quantization error on DUT. The quantization error introduced by ADC 22 or digital quantizer 32 can be modeled as additive noise sequence en as illustrated in FIG. 4. The z-transform Y(zxe2x88x921) of sequence y(n) can be expressed as a linear function of the z-transforms X(zxe2x88x921) and E(zxe2x88x921) of analog or digital input sequence x(n) and error sequence en.       Y    ⁢          xe2x80x83        ⁢          (              z                  -          1                    )        =                    H        ⁢                  xe2x80x83                ⁢                  (                      z                          -              1                                )                ⁢                  xe2x80x83                ⁢        X        ⁢                  xe2x80x83                ⁢                  (                      z                          -              1                                )                            [                  1          +                      H            ⁢                          xe2x80x83                        ⁢                          (                              z                                  -                  1                                            )                                      ]              +                  E        ⁢                  xe2x80x83                ⁢                  (                      z                          -              1                                )                            [                  1          +                      H            ⁢                          xe2x80x83                        ⁢                          (                              z                                  -                  1                                            )                                      ]            
where H(zxe2x88x921) is the z-transform of the transfer function of filter 20. The transfer function G(zxe2x88x921) of modulator 14 or demodulator 32 as seen by input sequence xn is                               G          ⁢                      xe2x80x83                    ⁢                      (                          z                              -                1                                      )                          =                                                            Y                ⁢                                  xe2x80x83                                ⁢                                  (                                      z                                          -                      1                                                        )                                                            X                ⁢                                  xe2x80x83                                ⁢                                  (                                      z                                          -                      1                                                        )                                                      ⁢                          |                                                E                  ⁢                                      xe2x80x83                                    ⁢                                      (                                          z                                              -                        1                                                              )                                                  =                0                                              =                                    H              ⁢                              xe2x80x83                            ⁢                              (                                  z                                      -                    1                                                  )                                                    1              +                              H                ⁢                                  xe2x80x83                                ⁢                                  (                                      z                                          -                      1                                                        )                                                                                        [        1        ]            
The transfer function of modulator 14 or demodulator 32 as seen by the additive noise sequence en is:                               F          ⁢                      xe2x80x83                    ⁢                      (                          z                              -                1                                      )                          =                                                            Y                ⁢                                  xe2x80x83                                ⁢                                  (                                      z                                          -                      1                                                        )                                                            E                ⁢                                  xe2x80x83                                ⁢                                  (                                      z                                          -                      1                                                        )                                                      ⁢                          |                                                X                  ⁢                                      xe2x80x83                                    ⁢                                      (                                          z                                              -                        1                                                              )                                                  =                0                                              =                      1                          1              +                              H                ⁢                                  xe2x80x83                                ⁢                                  (                                      z                                          -                      1                                                        )                                                                                        [        2        ]            
The input sequence xn includes components within a limited signal band, while the additive quantization noise sequence en is uniformly distributed over the entire frequency spectrum. When the xn sequence has only low frequency components, designers choose filter function H(zxe2x88x921) such that F(zxe2x88x921) is a high-pass response decreasing quantization noise at low frequencies and increasing it at high frequencies. With digital decimator 16 (FIG. 1) or low pass filter 36 (FIG. 3) having a low pass response, they remove much of the effects of high frequency quantization noise from the yn sequence without substantially distorting the low frequency components of the yn sequence controlled by the low frequency xn sequence.
For example, H(zxe2x88x921) can be chosen so that input sequence xn sees only a delayed feed-through, for example by setting       H    ⁢          xe2x80x83        ⁢          (              z                  -          1                    )        =            z              -        1                    1      -              z                  -          1                    
to provide a first order loop where
G(zxe2x88x921)=zxe2x88x921xe2x80x83xe2x80x83[3]
F(zxe2x88x921)=1xe2x88x92zxe2x88x921xe2x80x83xe2x80x83[4]
In this example, the input sees only a unit delay G(zxe2x88x921)=(zxe2x88x921) while the additive noise sees a first order, high-pass response F(zxe2x88x921)=1xe2x88x92zxe2x88x921. The noise shaping provided by F(zxe2x88x921) reduces the in-band noise, thereby causing a desirable increase in the in-band signal-to-noise ratio. Although F(zxe2x88x921) also causes an increase in out-of-band noise, the out-of-band noise can be largely removed from D by digital decimator 16 or low pass filter 36.
In the above example, a single zero at DC appears in noise transfer function F(zxe2x88x921). However some designers provide a noise-shaping transfer function F(zxe2x88x921) having multiple zeros at DC or distributed over the signal band, though it is necessary to choose F(zxe2x88x921) carefully to ensure system stability, particularly for systems implementing higher order feedback loops. (The low-pass or band-pass characteristics of decimator 16 or low pass filter 36 are suitably selected to complement the noise shaping characteristics of the F(zxe2x88x921) transfer function.) Thus one of the most important tasks in designing a sigma-delta DAC or ADC is to chose the transfer function H(zxe2x88x921) of the sigma-delta modulator or demodulator. H(zxe2x88x921) can be written in zero-pole form as:       H    ⁢          xe2x80x83        ⁢          (              z                  -          1                    )        =                    B        ⁢                  xe2x80x83                ⁢                  (                      z                          -              1                                )                            A        ⁢                  xe2x80x83                ⁢                  (                      z                          -              1                                )                      =                            ∏                      i            =            1                    NZ                ⁢                  xe2x80x83                ⁢                  (                      1            -                                          z                                  -                  1                                            ⁢                              xe2x80x83                            ⁢                              z                i                                              )                                      ∏                      i            =            1                    NP                ⁢                  xe2x80x83                ⁢                  (                      1            -                                          z                                  -                  1                                            ⁢                              xe2x80x83                            ⁢                              p                i                                              )                    
where NZ and NP are the total number of zeros and poles, respectively. Using the above representation for H(zxe2x88x921) we obtain             G      ⁢              xe2x80x83            ⁢              (                  z                      -            1                          )              =                            H          ⁢                      xe2x80x83                    ⁢                      (                          z                              -                1                                      )                                    1          +                      H            ⁢                          xe2x80x83                        ⁢                          (                              z                                  -                  1                                            )                                          =                        B          ⁢                      xe2x80x83                    ⁢                      (                          z                              -                1                                      )                                                A            ⁢                          xe2x80x83                        ⁢                          (                              z                                  -                  1                                            )                                +                      B            ⁢                          xe2x80x83                        ⁢                          (                              z                                  -                  1                                            )                                                      F      ⁢              xe2x80x83            ⁢              (                  z                      -            1                          )              =                  1                  1          +                      H            ⁢                          xe2x80x83                        ⁢                          (                              z                                  -                  1                                            )                                          =                        A          ⁢                      xe2x80x83                    ⁢                      (                          z                              -                1                                      )                                                A            ⁢                          xe2x80x83                        ⁢                          (                              z                                  -                  1                                            )                                +                      B            ⁢                          xe2x80x83                        ⁢                          (                              z                                  -                  1                                            )                                          
From the above expressions for input and error transfer functions G(zxe2x88x921) and F(zxe2x88x921), it is apparent that we can improve signal-to-noise ratio within the signal band by choosing A(zxe2x88x921) to be small and B(zxe2x88x921) to be large within that signal band. However one major limitation of prior art sigma-delta ADCs and DACs is that A(zxe2x88x921) and B(zxe2x88x921) cannot be chosen independently. In practice, designers initially choose A(zxe2x88x921) to provide desired noise shaping characteristics, for example to provide multiple zeros at DC or distributed over the signal band. With A(zxe2x88x921) thus established, designers then choose B(zxe2x88x921) to provide a desired input transfer function G(zxe2x88x921), but the range of choices of B(zxe2x88x921) are restricted to values that will keep the system stable and which render G(zxe2x88x921) essentially a delaying feed-through so as to avoid distorting the input sequence. The tight interdependence of G(zxe2x88x921) and F(zxe2x88x921) therefore limits the freedom a designer has when designing a sigma-delta ADC or DAC.
What is needed is a sigma-delta data converter architecture that reduces the interdependence of G(zxe2x88x921) and F(zxe2x88x921) so that the designer has more freedom to independently adjust the signal and noise transfer functions.
A sigma-delta data converter in accordance with the invention converts an analog or digital input sequence of elements xn, each representing a magnitude with at least p-bit resolution, into an m-bit output sequence yn, where p greater than m greater than 0. The sigma-delta data converter offsets the xn element sequence by a first feedback sequence of elements cn proportional in magnitude to output sequence elements yn thereby to produce a sequence of analog or digital elements an. The sigma-delta data converter passes the an sequence through an analog or digital filter having a transfer function H(zxe2x88x921) to produce a sequence of elements dn that are offset by an error feedback sequence of elements rn to produce an analog or digital sequence of elements bn, each having more than m bits. The digital or analog elements bn are then quantized (either by an m-bit analog-to-digital converter or by a digital quantizer) to produce the m-bit output yn sequence.
In accordance with the invention, to increase the signal-to-noise ratio at a signal band of interest, the sigma-delta data converter includes a quantization error feedback circuit for processing the bn and yn elements to generate a sequence of elements en, each representing a quantization error between magnitudes represented by corresponding sequence elements bn and yn. The error feedback circuit filters the sequence of elements en with a transfer function R(zxe2x88x921) to produce the rn sequence.
In an embodiment of the invention in which the sigma-delta data converter is a digital-to-analog converter, where the xn element sequence is a digital representation of an analog waveform to be generated, an m-bit digital-to-analog converter converts the sequence of elements yn into an analog signal that is filtered by a low pass or band pass filter to produce the analog waveform specified by the xn element sequence. The filter removes the out-of-band quantization noise from the analog waveform.
In an embodiment of the invention in which the sigma-delta data converter is an analog-to-digital converter, where the xn element sequence is a sequence of analog samples of an analog waveform, a digital decimator filters and reduces the sampling rate of the yn sequence by a factor of k to produce an output data sequence D representing the analog waveform. The filtration provided by the decimator removes out-of-band quantization noise from data sequence D.
The invention permits the quantization noise in the yn sequence to be shaped by transfer function R(zxe2x88x921) without affecting the response of the sigma-delta data converter relative to the x(n) sequence, which is determined by transfer function H(zxe2x88x921) and not influenced by transfer function R(zxe2x88x921).